Bloomlife is a Lanza techVentures portfolio company with a business proposition unlike any of the more traditional companies in the portfolio. Instead of products so far down the semiconductor supply chain that they are hard to explain to consumers, Bloomlife is building a medical device targeting expectant mothers and their partners.
The product, a home-monitoring device used by women in the last trimester of their pregnancy, has the potential to support OBGYN in detecting pre-term labor, heartbeat and other indications of fetal health. When asked why what attracted him to Bloomlife, Lucio Lanza, Lanza techVentures’ Managing Partner, quickly answered, “It gives women peace of mind. It connects the mother to the baby, one of the key motivators for the investment.” A product like this enables moms to have a connection to the baby and to give them a way to take charge of their pregnancies, he added.
https://lanzatechventures.com/wp-content/uploads/2022/01/blog-bloomlife.jpg6281200becky_lanzahttps://lanzatechventures.com/wp-content/uploads/2020/04/lanzatechventureslogo.pngbecky_lanza2022-01-14 08:24:522022-01-14 08:24:52Bloomlife: Ensuring Every Family Gets a Healthy Start
The global chip shortage dominates the news and the semiconductor industry worries. Even consumers who thought nothing about what powers their mobile devices understand the next model may be years away due to the shortage.
One workable way out of the shortage is to reuse existing field programmable gate array (FPGA) designs with today’s technology and Lanza techVentures portfolio company Plunify could just be part of that solution. Its design software, in use at various systems companies developing FPGAs, optimizes a design’s performance and eliminates many performance deficiencies.
Plunify, the name a combination of programmable logic (PL) and unify, was founded in 2009 by Harnhua Ng and Kirvy Teo who understand the challenges confronting FPGA engineers using vendor-specific design tools. They identified a way to compile and optimize register transfer level (RTL) code for an FPGA application using powerful, machine learning algorithms. The tool called InTime applies synthesis and place and route (P&R) technology to analyze design data and optimize it for better performing FPGA designs.
Lanza techVentures portfolio company Palma Ceia SemiDesign recently announced that it taped out two chips supporting the Wi-Fi HaLow wireless connectivity protocol. It’s welcome news for the IoT market and a great story, especially since the move to chips is a bit of a departure from Palma Ceia’s original plan to provide only IP solutions for wired connectivity.
Before we explore Palma Ceia and its changing business model, it’s best to start at the beginning when Palma Ceia CEO Roy Jewell met Lanza techVentures Managing Partner Lucio Lanza. As much as either of them can remember, Lucio was an emissary for the legendary Joe Costello in 1990, give or take a year or two, helping build Cadence Design Systems into an EDA powerhouse. Joe as Cadence’s CEO sent Lucio to meet Roy, an executive at Technology Modeling Associates (TMA) — the leading provider of Technology CAD software, TCAD for short — to determine whether it fit within Cadence’s burgeoning product portfolio. The Cadence-TMA combination didn’t happen. TMA went public on Nasdaq in 1996 and was acquired by Avanti in 1998. Nevertheless, Lucio and Roy stayed in touch.
After Avanti, Roy went on to become president and COO of Magma Design Automation, a role he held for 11 years. After Synopsys acquired Magma in 2012, Roy turned to Lucio for advice on what to do next. Lucio, thinking broadly and long term about the growing IoT market, told him to start an analog and wireless IP company. While it’s a huge technical challenge, edge devices, Lucio reasoned, need to communicate wirelessly and demand would be strong. Roy took the counsel, accepted the challenge and started Palma Ceia in 2012.
https://lanzatechventures.com/wp-content/uploads/2021/07/blog-palmaceia.jpg6281200becky_lanzahttps://lanzatechventures.com/wp-content/uploads/2020/04/lanzatechventureslogo.pngbecky_lanza2021-07-19 06:32:592021-10-21 03:21:39Palma Ceia: Enabling Wireless Connectivity at the Edge
Efabless is “efabulous.” That’s because Efabless brings the cost, creativity and productivity benefits of open innovation to semiconductors. It is a virtual stadium of highly skilled professionals, academics and companies available on demand and enabled with a marketplace, EDA tools, IP, SoC design templates and foundry process design kits (PDKs) at no upfront cost with no licenses required. Efabless delivers new business models of revenue sharing transforming the economics of the industry and its customers. IoT and other product companies with great ideas but without the capital, can now get the custom ICs required to meet their market needs. IC entrepreneurs can now get to prototype and market at a cost that can be covered with their credit card.
Let’s back up as the story’s getting ahead of itself. Meet Mike Wishart, CEO of Efabless, with an impressive resume that includes managing director roles at Goldman Sachs and Lehman Brothers. While you may not recognize his name, Mike was behind many of the successful IPOs and M&A deals that dominated the technology and IC industry news for many years.
Similarly, Mohamed Kassem, Efabless’ CTO, has an equally impressive resume from the technical side of the business. Early in his career, he worked for Mentor, a Siemens Business, as an analog/mixed-signal development engineer, then an illustrious tenure at TI as head of engineering for the worldwide analog design infrastructure, followed by OMAP Smartphone business manager. Mohamed brought up the analog libraries for the TI cellphone business for every advanced node from 130nm to 28nm.
Neither knew each other, though both saw signs that design was moving more toward a global, more collaborative approach to solving engineering problems, much like crowdsourcing in the software world. They had a vision of applying community business models and open innovation to IC design well before open source ASIC design and technologies like RISC-V became hot industry trends.
The semiconductor industry today is filled with inspired ideas for useful IoT edge devices, a ready-made opportunity for new approaches and strategic changes to building cost-sensitive, low-power SoCs.
Despite commendable intentions, IoT is an immature market with little of significance created yet. Some of that is because designers are experimenting. Others with domain experience don’t have the expertise, resources or interest to attract new “Things” to the internet and implement the necessary hardware devices. On the other end of the spectrum, clever entrepreneurs have too little design expertise or resources to build an economical SoC to deploy at a large scale. They need savvy engineers, as well as investors to foot foundry costs. They have other hurdles. In some cases, good ideas are too expensive because an IoT edge device often is only viable as a single-chip implementation. The cost to produce an SoC limits any experimentation, especially in the IoT space where networks must be built using many small devices.
What’s needed is a practical way to make a single or small number of these devices and have them connect to each other naturally and effectively.
Adapt, a Lanza techVentures portfolio company, may have a solution. Its vision is to develop SoCs efficiently enough to make it practical to implement low-cost, minimum viable devices to support applications with flexible, non-rigid specifications before real-world experiences.