EDA Challenges Machine Learning
Dec 14, 2017
“Using a cost function based on power or total energy, one can use machine learning trained on existing designs on the current node to optimize new designs on the same node,” asserts Lucio Lanza, managing director of Lanza techVentures. “While, a new node presents different physics constraints and may have a new structure, a new node is developed based on our understanding of older nodes. This means there is information in designs from previous nodes that can guide design in the latest node. Using what is called transfer learning, we can take machine learning models trained on previous nodes and use them as a starting point for building models for the new node. This would mean that one would not need to build new machine learning models from scratch for each node. They can start from a position of experience and this can be transferred.”
Brian Bailey, Semiconductor Engineering
PDF Solutions: The Rock of Ages
Sep 7, 2017
Peggy Aycinena profiles PDF Solutions in her latest blog post on EDACafe and mentions Lanza techventures’ Lucio Lanza has been on its board of directors for 20 years, serving as Chairman since 2004.
Peggy Aycinena, EDACafe
An Innovator’s Vision
Aug 28, 2017
To innovate you have to see patterns from the past and project them into the future. Lucio Lanza talks about a likely pattern for the future.
Brian Bailey, Semiconductor Engineering
Is Design Innovation Slowing?
Aug 10, 2017
“Today, it has moved from applications to things that can impact society,” said Lucio Lanza, managing director of Lanza techVentures. “We are in the middle of this change right now. For example, the new generation does not care about spending time walking around a mall. It’s a waste of time. They don’t need to meet people in the shopping mall. They can meet them on Facebook.”
Brian Bailey, Semiconductor Engineering
AI-powered Drug Discovery Captures Pharma Interest
Jul 12, 2017
Eric Smalley, Nature Biotechnology
IoT Myth Busting
Jul 13, 2017
“Lucio Lanza, managing partner at Lanza techVentures, is in total agreement. ‘The design automation segment of the industry needs to be alert and in front of the pack. IoT design is unique because it is not driven by the next node, and we’ll need to understand the driving factors to be able to support the evolving needs of IoT. And now that we know the next segment of design challenges may not be just the increase in complexity of SoC, we need to become strategically alert. It may be the optimization of silicon-on-package or IP-on-substrate driven by power or the ability to make memories connect in a more effective way, or FPGAs become the foundation of inexpensive innovative ideas or…who knows what?'”
Brian Bailey, Semiconductor Engineering
When Digital, Physical Worlds Merge
Jul 6, 2017
Ed Sperling, Semiconductor Engineering
Takeda Explores Potential of AI Drug Discovery Model
Jul/Aug 2017 Issue
On page 10, Numerate’s CEO Guido Lanza provides details on the Takeda deal and what it could mean for both companies.
Pharmafocus
When Your Sweat Knows More about You…
Apr 10, 2017
Junko Yoshida, EBN
My Breakfast with Lucio
Mar 29, 2017
“…we met in the very comfortable environment of Il Fornaio in Palo Alto. Even for breakfast, Lucio invites you to an Italian restaurant because…well, how else will you get good coffee in a country that is not Italy?”
Paul McLellan, Cadence Breakfast Bytes
How Lucio Went from Italy to EDA via Intel
Mar 28, 2017
“Lucio had a true gift for anticipating the products and technologies that would soon be needed by our customers. Sometimes his insights were controversial but his predictions were always right on,” stated Joe Costello.
Paul McLellan, Cadence Breakfast Bytes
2017: Tool And Methodology Shifts
Jan 12, 2017
An important part of that vision is making IP more portable. “The semiconductor ecosystem and its customers will have a new resource in 2017 with the emergence of an online marketplace that connects demand with a global community of IC and IP designers,” says Mike Wishart, CEO of efabless.com. “The acute need for customized silicon for smart hardware products will be met by a community of unaffiliated designers on affordable, re-purposed 180nm nodes with libraries of proprietary and open-source processors and on-demand analog and mixed signal IP.”
Brian Bailey, Semiconductor Engineering